[PATCH 1/3] dt-bindings: pinctrl: s32g2-siul2: describe EIRQ input mux registers

[Khristine Andreea Barbulescu]

The SIUL2 external interrupt lines (EIRQ0-EIRQ31) on S32G2/S32G3 are not
hard-wired to fixed pads. Each EIRQ line has its own input multiplexer,
implemented by the IMCR398-IMCR429 registers, whose Source Signal Select
(SSS) field selects which pad signal feeds the edge detector.

These registers were previously listed as reserved and were absent from
the reg list. Add a dedicated entry for the IMCR398-IMCR429 EIRQ input
multiplexer window between the two regular IMCR groups, update the
example and the minimum item count for the GPIO/EIRQ variant, and drop
IMCR398-IMCR429 from the reserved-index note.

Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@xxxxxxxxxxx>
---
 .../bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml        | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
index 36f2393fa406..ecf6d61a80e9 100644
--- a/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
@@ -23,7 +23,9 @@ description: |
   are used for external interrupt configuration.
 
   Please note that some register indexes are reserved in S32G2, such as
-  MSCR102-MSCR111, MSCR123-MSCR143, IMCR84-IMCR118 and IMCR398-IMCR429.
+  MSCR102-MSCR111, MSCR123-MSCR143 and IMCR84-IMCR118. IMCR398-IMCR429
+  are not regular pin IMCRs but the EIRQ input multiplexer registers,
+  which select the pad signal routed to each external interrupt line.
 
 properties:
   compatible:
@@ -53,6 +55,7 @@ properties:
       - description: MSCR registers group 2 in SIUL2_1
       - description: IMCR registers group 0 in SIUL2_0
       - description: IMCR registers group 1 in SIUL2_1
+      - description: IMCR398-IMCR429 EIRQ input multiplexer registers in SIUL2_1
       - description: IMCR registers group 2 in SIUL2_1
       - description: PGPDO registers in SIUL2_0
       - description: PGPDI registers in SIUL2_0
@@ -141,7 +144,7 @@ oneOf:
       - interrupts
     properties:
       reg:
-        minItems: 11
+        minItems: 12
 
 additionalProperties: false
 
@@ -162,6 +165,8 @@ examples:
               <0x4009ca40 0x150>,
               /* IMCR119-IMCR397 registers on siul2_1 */
               <0x44010c1c 0x45c>,
+              /* IMCR398-IMCR429 (EIRQ input mux) on siul2_1 */
+              <0x44011078 0x80>,
               /* IMCR430-IMCR495 registers on siul2_1 */
               <0x440110f8 0x108>,
               /* PGPDO registers on siul2_0 */
-- 
2.34.1