[PATCH v6 08/11] arm64: dts: qcom: ipq5210: Enable the PWM block

From: Varadarajan Narayanan

Date: Thu Oct 08 2026 - 05:25:36 EST


Describe and enable the PWM block on IPQ5210.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi | 14 ++++++++++++++
arch/arm64/boot/dts/qcom/ipq5210.dtsi | 10 ++++++++++
2 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi
index 9f493561037c..eceb6e0ca6fe 100644
--- a/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5210-rdp504-common.dtsi
@@ -89,6 +89,13 @@ &pcie1_port0 {
reset-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
};

+&pwm {
+ pinctrl-0 = <&pwm_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&qpic_bam {
status = "okay";
};
@@ -158,6 +165,13 @@ pcie0_default_state: pcie0-default-state {
bias-pull-down;
};

+ pwm_default_state: pwm-default-state {
+ pins = "gpio11";
+ function = "pwm0";
+ drive-strength = <6>;
+ bias-pull-down;
+ };
+
qpic_snand_default_state: qpic-snand-default-state {
data-pins {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
index 9b6ebc9f59d3..6440853da8c3 100644
--- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
@@ -398,6 +398,16 @@ tcsr: syscon@1937000 {
reg = <0x0 0x01937000 0x0 0x2b000>;
};

+ pwm: pwm@1941010 {
+ compatible = "qcom,ipq5210-pwm", "qcom,ipq6018-pwm";
+ reg = <0x0 0x01941010 0x0 0x20>;
+ clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
+ assigned-clock-rates = <100000000>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
qupv3: geniqup@1ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x0 0x01ac0000 0x0 0x2000>;

--
2.34.1