[PATCH 2/3] arm64: dts: imx8mm-venice: Move board Root Port children under &pcie0_port0
From: Sherry Sun (OSS)
Date: Wed Oct 21 2026 - 05:07:46 EST
From: Sherry Sun <sherry.sun@xxxxxxx>
Commit 37f53f50b36f ("arm64: dts: imx8mm: Add Root Port node and PERST
property") added a Root Port node pcie@0 to the SoC level host bridge.
However, the Gateworks imx8mm-venice boards already described the Root
Port as pcie@0,0 in the board DT.
Both nodes now share devfn 0 under the same host bridge.
of_pci_find_child_device() returns the first match, which is the SoC
pcie@0 node, so the board level Root Port node and all of its children
become stale. Also, since both nodes have device_type = "pci",
pci_host_common_parse_ports() registers two Root Ports for the same
port.
Fix this by moving the children of the board level Root Port node under
&pcie0_port0 and dropping the duplicated board level Root Port node.
The moved nodes are now located on the secondary bus of the Root Port
(bus 1), so update their reg bus number and unit addresses accordingly
to keep dtc pci_device_reg/pci_device_bus_num checks happy. Only the
devfn is used to match the PCI device to its DT node, so this does not
change the matching.
Fixes: 37f53f50b36f ("arm64: dts: imx8mm: Add Root Port node and PERST property")
Reported-by: Ahmad Fatoum <a.fatoum@xxxxxxxxxxxxxx>
Closes: https://lore.kernel.org/all/171421fb-d0a6-4e3f-b2dc-226e9c548972@xxxxxxxxxxxxxx/
Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx>
---
.../boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 22 ++++++++--------------
.../boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 22 ++++++++--------------
.../boot/dts/freescale/imx8mm-venice-gw7902.dts | 16 +++++-----------
3 files changed, 21 insertions(+), 39 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
index 266038fbbef9..404600f121b6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
@@ -156,36 +156,30 @@ &pcie0 {
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
<&clk IMX8MM_SYS_PLL2_250M>;
status = "okay";
+};
+&pcie0_port0 {
pcie@0,0 {
- reg = <0x0000 0 0 0 0>;
+ reg = <0x10000 0 0 0 0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
- pcie@0,0 {
- reg = <0x0000 0 0 0 0>;
+ pcie@3,0 {
+ reg = <0x1800 0 0 0 0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
- pcie@3,0 {
- reg = <0x1800 0 0 0 0>;
- device_type = "pci";
+ eth1: ethernet@0,0 {
+ reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
- eth1: ethernet@0,0 {
- reg = <0x0000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
-
- local-mac-address = [00 00 00 00 00 00];
- };
+ local-mac-address = [00 00 00 00 00 00];
};
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
index 2aa6c1090fc7..1bf1a34551d9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
@@ -176,36 +176,30 @@ &pcie0 {
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
<&clk IMX8MM_SYS_PLL2_250M>;
status = "okay";
+};
+&pcie0_port0 {
pcie@0,0 {
- reg = <0x0000 0 0 0 0>;
+ reg = <0x10000 0 0 0 0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
- pcie@0,0 {
- reg = <0x0000 0 0 0 0>;
+ pcie@4,0 {
+ reg = <0x2000 0 0 0 0>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
- pcie@4,0 {
- reg = <0x2000 0 0 0 0>;
- device_type = "pci";
+ eth1: ethernet@0,0 {
+ reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
- eth1: ethernet@0,0 {
- reg = <0x0000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
-
- local-mac-address = [00 00 00 00 00 00];
- };
+ local-mac-address = [00 00 00 00 00 00];
};
};
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index 468c7e993c52..38c019790511 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -635,22 +635,16 @@ &pcie0 {
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
<&clk IMX8MM_SYS_PLL2_250M>;
status = "okay";
+};
- pcie@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
+&pcie0_port0 {
+ eth1: ethernet@0,0 {
+ reg = <0x10000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
- eth1: ethernet@0,0 {
- reg = <0x0000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
-
- local-mac-address = [00 00 00 00 00 00];
- };
+ local-mac-address = [00 00 00 00 00 00];
};
};
--
2.50.1