Re: [PATCH v6 04/18] dt-bindings: soc: starfive: Add starfive,jh7110-hdmi-subsystem

From: Conor Dooley

Date: Thu Oct 29 2026 - 19:07:01 EST


On Thu, Oct 29, 2026 at 08:53:38AM +0100, Michal Wilczynski wrote:
> Add the dt-binding for the StarFive JH7110 HDMI subsystem.
>
> The JH7110 HDMI IP is a monolithic block containing both the digital
> controller and analog PHY in a single register space. This binding
> defines the parent device, which holds the shared register map, and its
> two children: the PHY and the controller.
>
> The two have separate resources. The PHY takes the 24 MHz reference
> clock and provides both the pixel clock, which the VOUT clock generator
> routes on to the display controller, and the phy the controller uses.
> The controller takes its clocks from the VOUT clock generator. What
> they share is the register space, which the parent maps.
>
> Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> Signed-off-by: Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>
> ---
> .../starfive/starfive,jh7110-hdmi-subsystem.yaml | 95 ++++++++++++++++++++++
> 1 file changed, 95 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-hdmi-subsystem.yaml b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-hdmi-subsystem.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..2ff8b0b920aec41a83f0aeaa0ed9c4249fe87f46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-hdmi-subsystem.yaml

Why is this in bindings/soc? I feel like it should be in
bindings/display or something along those lines, since it's the display
subsystem of the device?

Cheers,
Conor.

> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-hdmi-subsystem.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 HDMI subsystem
> +
> +maintainers:
> + - Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>
> +
> +description:
> + The StarFive JH7110 HDMI block is a monolithic IP containing both
> + the digital controller logic and the analog PHY logic in a single
> + register space. It sits inside the video output subsystem, which owns
> + the NoC bus clock and reset gating this region and the power domain it
> + belongs to.
> +
> +properties:
> + compatible:
> + const: starfive,jh7110-hdmi-subsystem
> +
> + reg:
> + maxItems: 1
> +
> + phy:
> + $ref: /schemas/phy/starfive,jh7110-inno-hdmi-phy.yaml#
> +
> + controller:
> + $ref: /schemas/display/bridge/starfive,jh7110-inno-hdmi-controller.yaml#
> +
> +required:
> + - compatible
> + - reg
> + - phy
> + - controller
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/starfive,jh7110-crg.h>
> + #include <dt-bindings/reset/starfive,jh7110-crg.h>
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + hdmi@29590000 {
> + compatible = "starfive,jh7110-hdmi-subsystem";
> + reg = <0x29590000 0x4000>;
> +
> + controller {
> + compatible = "starfive,jh7110-inno-hdmi-controller";
> + clocks = <&voutcrg JH7110_VOUTCLK_HDMI_TX_SYS>,
> + <&voutcrg JH7110_VOUTCLK_HDMI_TX_MCLK>,
> + <&voutcrg JH7110_VOUTCLK_HDMI_TX_BCLK>,
> + <&hdmi_phy>;
> + clock-names = "pclk", "mclk", "bclk", "pixel";
> + interrupts = <99>;
> + phys = <&hdmi_phy>;
> + resets = <&voutcrg JH7110_VOUTRST_HDMI_TX_HDMI>;
> + starfive,vout-syscon = <&vout_syscon>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + endpoint {
> + remote-endpoint = <&dpu_out_dpi0>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + endpoint {
> + remote-endpoint = <&hdmi_con_in>;
> + };
> + };
> + };
> + };
> +
> + hdmi_phy: phy {
> + compatible = "starfive,jh7110-inno-hdmi-phy";
> + #clock-cells = <0>;
> + clocks = <&xin24m>;
> + #phy-cells = <0>;
> + };
> + };
> + };
> +...
>
> --
> 2.34.1
>

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