Re: [PATCH 1/2] dt-bindings: iio: adc: add lltc,ltc2387

[Nicolae-Daniel Deaconescu]

On Tue, Oct 27, 2026 at 18:28:34 +0000, Conor Dooley wrote:
> Why are we getting new devices with linear vendor prefixes?

I'll fix this in v2. The binding file will be adi,ltc2387.yaml.
The -x4 compatibles will also be dropped, because they described
four devices sharing one AXI ADC.

> Hmm, ltc2387-16 does not appear to have these signals?
> Well, it has "cnv" but "cnv" has "sample clock" as the input name so is
> the clocks property above and pwm-clock can be used if the provider is a
> pwm?

The LTC2387-16 datasheet has these pins: CNV+/CNV- (pins 27/28), which
is the conversion-start input; CLK+/CLK- (pins 23/24), which is an
externally applied clock that shifts out the result; and DCO+/DCO-,
the echoed clock. There is no clk_gate pin.

The part needs a burst of 8 CLK pulses per conversion in one-lane mode
(4 in two-lane), starting t_FIRSTCLK = 65 ns after CNV and ending
within t_LASTCLK = 49 ns of the next CNV. So the CLK input cannot run
freely: the clk_gate PWM gates the host clock into that burst. That is
why the clock needs a PWM and not a plain pwm-clock, which would give
a continuous clock. The clocks property is the reference clock the PWM
generator runs from, and the driver needs its rate to compute the
waveforms.

> Please explain how this is not determinable from the compatible.

TWOLANES is a digital input on the chip. High selects two-lane output,
two bits per clock on DA and DB; low selects one-lane output. Both
modes exist on every part, and the pin is set by how the board is
wired, so the compatible does not say which mode is used.
v2 will contain more detail in the description.

Thanks,
Daniel