[PATCH v2 0/2] Improve eMMC performance for the StarFive JHB100 SoC

[Changhuang Liang]

This series implements a generic interface to configure CIT based on
time (ns). Different platforms can improve MMC performance by
configuring their respective CIT. This series has been tested on the
JHB100 SoC.

before:
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=800
838860800 bytes (839 MB, 800 MiB) copied, 9.38511 s, 89.4 MB/s
dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=800
838860800 bytes (839 MB, 800 MiB) copied, 12.2127 s, 68.7 MB/s

after:
dd if=/dev/mmcblk0 of=/dev/null bs=1M count=800
838860800 bytes (839 MB, 800 MiB) copied, 3.19472 s, 263 MB/s
dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=800
838860800 bytes (839 MB, 800 MiB) copied, 10.7587 s, 78.0 MB/s

Changes since v1:

Patch 1:
- Add a cit field to struct cqhci_host.
- cqhci_set_cmd_idle_time() caches cit in cq_host->cit.
- __cqhci_enable() applies the cached CIT value to CQHCI_SSC1
  (only when non-zero).

Patch 2:
- dwcmshc_cqhci_init() calls cqhci_set_cmd_idle_time() once at
  init time when cqhci_cit_ns is set.
- Replace the JHB100-specific pre_enable hook (dwcmshc_starfive_jhb100_pre_enable)
  and its private cqhci_host_ops with a new cqhci_cit_ns field in
  struct dwcmshc_pltfm_data.
- sets .cqhci_cit_ns = JHB100_CQHCI_CIT_NS.

v1: https://lore.kernel.org/all/20261014121222.31385-1-changhuang.liang@xxxxxxxxxxxxxxxx/

Changhuang Liang (2):
  mmc: cqhci: Add support for setting command idle time in nanoseconds
  mmc: sdhci-of-dwcmshc: Set CQHCI command idle time for StarFive JHB100

 drivers/mmc/host/cqhci-core.c       | 64 +++++++++++++++++++++++++++++
 drivers/mmc/host/cqhci.h            |  8 ++++
 drivers/mmc/host/sdhci-of-dwcmshc.c | 12 ++++++
 3 files changed, 84 insertions(+)

--
2.25.1