[PATCH 2/5] gpio: ppc44x: factor out the OSR/TSR source selection

From: Rosen Penev

Date: Wed Nov 04 2026 - 17:47:35 EST


Both direction callbacks clear the pin's 2-bit field in the output
source and three-state source registers, picking the low or high
register by bank. Move that into a helper instead of duplicating the
if/else in each callback.

No functional change; the registers are written in the same order.

Signed-off-by: Rosen Penev <rosenp@xxxxxxxxx>
---
drivers/gpio/gpio-ppc44x.c | 33 +++++++++++++++++----------------
1 file changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/gpio/gpio-ppc44x.c b/drivers/gpio/gpio-ppc44x.c
index 01dd5e7cc311..b3cbc832cf24 100644
--- a/drivers/gpio/gpio-ppc44x.c
+++ b/drivers/gpio/gpio-ppc44x.c
@@ -64,6 +64,21 @@ static inline void ppc44x_setbits32(void __iomem *addr, u32 mask)
iowrite32be(val, addr);
}

+/*
+ * Route the pin's output and three-state control to the GPIO controller
+ * rather than an alternate function. Bits 0-15 use OSRL/TSRL, bits 16-31
+ * use OSRH/TSRH.
+ */
+static void ppc44x_gpio_select_gpio(struct ppc44x_gpio __iomem *regs,
+ unsigned int gpio)
+{
+ __be32 __iomem *osr = gpio < 16 ? &regs->osrl : &regs->osrh;
+ __be32 __iomem *tsr = gpio < 16 ? &regs->tsrl : &regs->tsrh;
+
+ ppc44x_clrbits32(osr, GPIO_MASK2(gpio));
+ ppc44x_clrbits32(tsr, GPIO_MASK2(gpio));
+}
+
/*
* GPIO LIB API implementation for GPIOs
*
@@ -99,14 +114,7 @@ static int ppc44x_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
ppc44x_clrbits32(&regs->tcr, GPIO_MASK(gpio));
gen_gc->sdir &= ~GPIO_MASK(gpio);

- /* Bits 0-15 use TSRL/OSRL, bits 16-31 use TSRH/OSRH */
- if (gpio < 16) {
- ppc44x_clrbits32(&regs->osrl, GPIO_MASK2(gpio));
- ppc44x_clrbits32(&regs->tsrl, GPIO_MASK2(gpio));
- } else {
- ppc44x_clrbits32(&regs->osrh, GPIO_MASK2(gpio));
- ppc44x_clrbits32(&regs->tsrh, GPIO_MASK2(gpio));
- }
+ ppc44x_gpio_select_gpio(regs, gpio);

return 0;
}
@@ -130,14 +138,7 @@ ppc44x_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
ppc44x_setbits32(&regs->tcr, GPIO_MASK(gpio));
gen_gc->sdir |= GPIO_MASK(gpio);

- /* Bits 0-15 use TSRL, bits 16-31 use TSRH */
- if (gpio < 16) {
- ppc44x_clrbits32(&regs->osrl, GPIO_MASK2(gpio));
- ppc44x_clrbits32(&regs->tsrl, GPIO_MASK2(gpio));
- } else {
- ppc44x_clrbits32(&regs->osrh, GPIO_MASK2(gpio));
- ppc44x_clrbits32(&regs->tsrh, GPIO_MASK2(gpio));
- }
+ ppc44x_gpio_select_gpio(regs, gpio);

pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);

--
2.56.0