[PATCH 4/5] gpio: ppc44x: use BIT() and GENMASK() for the pin masks

[Rosen Penev]

Express the per-pin masks with BIT() and GENMASK() rather than
open-coded shifts of 0x80000000 and 0xc0000000. The pins are numbered
from the MSB, matching the bit mapping gpio-mmio uses for
GPIO_GENERIC_BIG_ENDIAN.

No functional change; both forms yield the same mask for all 32 pins.

Signed-off-by: Rosen Penev <rosenp@xxxxxxxxx>
---
 drivers/gpio/gpio-ppc44x.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-ppc44x.c b/drivers/gpio/gpio-ppc44x.c
index 20b3e9ce48e8..8b9ea00f170c 100644
--- a/drivers/gpio/gpio-ppc44x.c
+++ b/drivers/gpio/gpio-ppc44x.c
@@ -9,6 +9,7 @@
  * Author: Steve Falco <sfalco@xxxxxxxxxx>
  */
 
+#include <linux/bits.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -18,8 +19,9 @@
 #include <linux/slab.h>
 #include <linux/platform_device.h>
 
-#define GPIO_MASK(gpio)		(0x80000000 >> (gpio))
-#define GPIO_MASK2(gpio)	(0xc0000000 >> (((gpio) % 16) * 2))
+/* Pins are numbered from the MSB; the select registers use 2 bits per pin */
+#define GPIO_MASK(gpio)		BIT(31 - (gpio))
+#define GPIO_MASK2(gpio)	(GENMASK(1, 0) << (30 - ((gpio) % 16) * 2))
 
 /* Physical GPIO register layout */
 struct ppc44x_gpio {
-- 
2.56.0