Re: [PATCH v4 0/2] iio: adc: Add the Ingenic X1600 ADC

From: H. Nikolaus Schaller

Date: Thu Nov 05 2026 - 05:03:28 EST


Hi,

> Am 02.11.2026 um 21:11 schrieb Olivier Louvignes <olivier@xxxxxxxxx>:
>
> A driver for the SAR ADC of the Ingenic X1600: four auxiliary channels,
> 12 bits, one interrupt per channel. Tested on a HiBy R1, whose keys are on
> channel 0 behind adc-keys.
>
> As in v3, this version is X1600-only. The X1830 and the X2000 have the
> same register layout by their programming manuals, and a chip_info with
> the channel count and the resolution can add them later, with a test on
> either.
>
> Changes in v4:
> - The Kconfig prompt, the header comment and MODULE_DESCRIPTION() are
> the same text (Andy).
> - The read computes the data register's bank and half next to each
> other, and the two macros take them (Andy).
> - X1600_ADC_CLK_RATE_HZ (Andy).
> - Read and write helpers that add the base (Andy). Plain MMIO rather
> than regmap: nothing is cached or shared, and the only
> read-modify-writes are under the conversion mutex or in probe.
> - The device clock rate is clamped before dividing (Andy); the divider
> comes out the same for every rate.
> - Binding: the description's last sentence and clock-names dropped; the
> driver takes its one clock unnamed (Krzysztof on v2 and Conor on v1:
> their reviews and v3 crossed).
> - Joshua's Reviewed-by on patch 2: the changes to it are the points
> above, with no change in behaviour.
>
> Changes in v3:
> - Cover letter (Andy, Joshua).
> - MAINTAINERS: no list line; the binding's path in patch 1, the driver's
> in patch 2 (Joshua).
> - Includes for what the driver uses, copyright line, MODULE_AUTHOR(),
> reverse xmas tree, open-coded return, no message after
> devm_request_irq(), a blank line (Joshua; Andy on the return).
> - fsleep(2 * USEC_PER_MSEC) (Andy).
> - The ADC clock divider is now even, as the X1600 programming manual
> has it; v2 wrote the divider minus one, as the vendor kernel does. The
> divider fields are named as in the manual, and the two clocks only
> repeated sampling uses stay at their reset values.
> - The probe comment on staying powered up no longer names the keys
> (Jonathan).
>
> Changes in v2 (Jonathan):
> - The comparison with the JZ47xx ADCs dropped from the file header.
> - No mod_devicetable.h include.
> - X1600_ADC_VREF_mV.
> - The status declaration split from its readl() in the interrupt
> handler.
> - field_get() for the channel's result.
> - fsleep(2000) instead of usleep_range().
>
> v3: https://lore.kernel.org/all/20261026083631.48406-1-olivier@xxxxxxxxx/
> v2: https://lore.kernel.org/all/20261024041357.34346-1-olivier@xxxxxxxxx/
> v1: https://lore.kernel.org/all/20261023204209.48556-1-olivier@xxxxxxxxx/
>
> Olivier Louvignes (2):
> dt-bindings: iio: adc: Add the Ingenic X1600 ADC
> iio: adc: Add a driver for the Ingenic X1600 ADC
>
> .../bindings/iio/adc/ingenic,x1600-adc.yaml | 53 ++++
> MAINTAINERS | 6 +
> drivers/iio/adc/Kconfig | 10 +
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/ingenic-x1600-adc.c | 257 ++++++++++++++++++
> 5 files changed, 327 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/ingenic,x1600-adc.yaml
> create mode 100644 drivers/iio/adc/ingenic-x1600-adc.c
>
>
> base-commit: a3b3580713f3ac5a32dc2874ee546828977a1d68
> --
> 2.54.0
>


I have added this driver to our LX16 kernel and it appears to work. I can see
some slightly fluctuating voltage values at e.g. /sys/bus/iio/devices/iio:device0/in_voltage0_raw.
Since the BGA balls are not routed on the LX16 I can't test the performance
of the SADC and/or driver.

for the series:

Tested-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx> # LX16 - driver only, no real world test