Re: [PATCH v4 0/2] i2c: i2c-xiic: fix clearing of bnb irq and waiting/ clearing while atomic

[Shubhrajyoti Datta]

On Mon, Nov 2, 2026 at 3:08 PM Thilo Zirnstein <thi.zirnstein@xxxxxxxxx> wrote:
>
> Dear all,
>
> This patch-series fixes the clearing routine for the bus not busy (bnb) irq
> plus the waiting and clearing routines while in atomic context.
>
> The bnb is used to indicate that the current transfer is done.
> A high level view of the software flow for tx:
>
> * init i2c controller
> * prepare all registers ( fill fifo, enable irqs, ... )
> * start i2c txfer
> * clear and enable bnb
> * wait for completion
> * ( serve interrupts )
> * ( bnb interrupt ): complete completion
>
> The datasheet ( pg090-axi-iic, Interrupt-Status-Register ISR)
> states that the bnb bit can only be cleared if
> the bus busy bit in the status register is set.
> So the iic controller must have recognized that their is some activity
> on the bus. ( Start condition )
>
> Currently the bnb bit is cleared without checking or waiting for this
> condition. This can lead to spurious bnb interrupts.
>
Reviewed-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx>

>