[PATCH v2 6/6] spi: cadence-xspi: Add workaround for old Marvell firmwares
From: Paul Cercueil
Date: Wed Nov 11 2026 - 05:38:46 EST
From: Tanmay Jagdale <tanmay@xxxxxxxxxxx>
Older firmwares from Marvell used the cdns,xspi-nor compatible string
for the Marvell-specific xSPI IP, which is incompatible.
Add a workaround to support this case, checking for a Marvell board in
the DTB or the ACPI tables.
Signed-off-by: Tanmay Jagdale <tanmay@xxxxxxxxxxx>
Co-developed-by: Paul Cercueil <paul.cercueil@xxxxxxxxxxx>
Signed-off-by: Paul Cercueil <paul.cercueil@xxxxxxxxxxx>
---
v2: Replace the workaround based on the presence of the "xfer" resource
with a mechanism that identifies a Marvell SoC based on the board's
compatible string on DTB, and the DSDT table on ACPI.
---
drivers/spi/spi-cadence-xspi.c | 37 +++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
index 8fa58a0412e3..ecb78fcc6228 100644
--- a/drivers/spi/spi-cadence-xspi.c
+++ b/drivers/spi/spi-cadence-xspi.c
@@ -2,6 +2,7 @@
// Cadence XSPI flash controller driver
// Copyright (C) 2020-21 Cadence
+#include <linux/acpi.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/err.h>
@@ -11,11 +12,13 @@
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
+#include <linux/string.h>
#include <linux/bitfield.h>
#include <linux/limits.h>
#include <linux/log2.h>
@@ -775,7 +778,6 @@ static void cdns_xspi_print_phy_config(struct cdns_xspi_dev *cdns_xspi)
readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_DLL_SLAVE_CTRL));
}
-#ifdef CONFIG_64BIT
static struct cdns_xspi_driver_data marvell_driver_data = {
.mrvl_hw_overlay = true,
.dll_phy_ctrl = MARVELL_REGS_DLL_PHY_CTRL,
@@ -788,6 +790,7 @@ static struct cdns_xspi_driver_data marvell_driver_data = {
.rfile_phy_dll_slave_ctrl = MARVELL_RFILE_PHY_DLL_SLAVE_CTRL,
};
+#ifdef CONFIG_64BIT
static const int cdns_mrvl_xspi_clk_div_list[] = {
4, //0x0 = Divide by 4. SPI clock is 200 MHz.
6, //0x1 = Divide by 6. SPI clock is 133.33 MHz.
@@ -1228,6 +1231,29 @@ static int cdns_xspi_transfer_one_message_b0(struct spi_controller *controller,
}
#endif
+static const struct acpi_platform_list mrvl_platform_list[] = {
+ {
+ .oem_id = "MRVL ",
+ .oem_table_id = "CN10K",
+ .table = ACPI_SIG_DSDT,
+ .pred = all_versions,
+ },
+ { }
+};
+
+static inline bool cdns_is_marvell(struct device *dev)
+{
+ const char *compatible;
+
+ if (has_acpi_companion(dev))
+ return acpi_match_platform_list(mrvl_platform_list) >= 0;
+
+ if (of_machine_read_compatible(&compatible, 0) < 0)
+ return false; /* shouldn't actually happen */
+
+ return strstarts(compatible, "marvell,");
+}
+
static int cdns_xspi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1249,6 +1275,15 @@ static int cdns_xspi_probe(struct platform_device *pdev)
if (!cdns_xspi->driver_data)
return -ENODEV;
+ if (IS_ENABLED(CONFIG_64BIT) &&
+ !cdns_xspi->driver_data->mrvl_hw_overlay &&
+ cdns_is_marvell(dev)) {
+ /* Some old firmwares use the base compatible string... */
+
+ dev_warn(dev, "Using the cdns,xspi-nor compatible string on a Marvell SoC. Please fix firmware!\n");
+ cdns_xspi->driver_data = &marvell_driver_data;
+ }
+
host->mem_ops = &cadence_xspi_mem_ops;
cdns_xspi->sdma_handler = &cdns_xspi_sdma_handle;
cdns_xspi->set_interrupts_handler = &cdns_xspi_set_interrupts;
--
2.47.3