> I've updated my x86 performance-monitoring counters patch.
Nice, you've got virtualised counters.
A little over a year ago I described a method by which you could do lazy
switching of the counters -- to avoid futzing with the MSRs on every
schedule. I can't find my message right now...
Generally, for each perfctr you add a "uint64 total" and "uint32 previous"
to the task struct (or shared for clone).
Then in __switch_to, you sample the perf counter(s), subtract previous,
and add to total prior to the switch.
After the switch you sample the perf counter(s), and store in previous.
You only need 32-bit previous because no events can happen more than 2^32
in one schedule (this used to be true).
And you only need to modify the event registers if the task you're
switching to is trying to sample a different event.
If you still want rdpmc you can leave it as a trap to kernel and simulate
it with a read from total.
The win is that you only need to write MSRs when you've got more than one
task using the counters. You avoid the need to zero the counters.
Dean
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