If I understand your question correctly, I think the answer is yes.
As an example, shared libraries are mmap'ed into each running
process as necessary, so it is entirely feasible for process A
to map libc (to pick a library at random) at a different virtual
address than process B, and since the code within the library is
shared between the processes (i.e. there are not actually two
physical copies of the library in memory), there would obviously
be two different virtual addresses (within two separate process
contexts) for the same physical page of memory.
Whether or not both of these can be in the cache at the same time
depends on a) does the cache hold references to physical memory
or virtual memory? and b) how big is the cache with respect to
the amount of code that gets executed (thus invalidating cache
lines) in the process of a context switch. I suspect the answer
is sometimes yes, sometimes no...
tw
On 04/03/2000 15:35 -0400, Ralph Blach wrote:
>> In the IBM 405gp, one can have instruction cache alias. Ie, multiple
>> real address in the
>> cache in two separate cache lines. This is because the instruction
>> cache an way size is
>> bigger than page size. In linux, is there ever a time when a real
>> instruction page has two differnent virutal address. If so, how does
>> this occur?
>>
>> Thanks
>>
>> Chip Blach
>> IBM MicroElectronics.
>>
>> -
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