Re: [PATCH] ASoC: wm8974: configure pll and mclk divider automatically

From: Charles Keepax
Date: Mon Jan 25 2016 - 08:50:34 EST

On Mon, Jan 25, 2016 at 12:36:43PM +0000, Mans Rullgard wrote:
> This adds a set_sysclk() DAI op so the card driver can set the
> input clock frequency. If this is done, the pll and mclk divider
> are configured to produce the required 256x fs clock when the
> sample rate is set by hw_params().
> These additions make the codec work with the simple-card driver.
> Card drivers calling set_pll() and set_clkdiv() directly are
> unaffected.
> Signed-off-by: Mans Rullgard <mans@xxxxxxxxx>
> ---

Acked-by: Charles Keepax <ckeepax@xxxxxxxxxxxxxxxxxxxxxxxxxxx>