Re: [PATCH] clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent
From: Maxime Ripard
Date: Wed Oct 19 2016 - 10:46:00 EST
On Tue, Oct 18, 2016 at 01:42:09PM +0800, Chen-Yu Tsai wrote:
> On the A31, the DMA engine only works if AHB1 is clocked from PLL6.
> In addition, the hstimer is clocked from AHB1, and if AHB1 is clocked
> from the CPU clock, and cpufreq is working, we get an unstable timer.
>
> Force the AHB1 clock to use PLL6 as its parent. Previously this was done
> in the device tree with the assigned-clocks and assigned-clocks-parent
> bindings. However with this new monolithic driver, the system critical
> clocks aren't exported through the device tree. The alternative is to
> force this setting in the driver before the clocks are registered.
>
> This is also done in newer versions of mainline U-boot. But people still
> using an older version, or even the vendor version, can still hit this
> issue. Hence the need to do it in the kernel as well.
>
> Reported-by: Hans de Goede <hdegoede@xxxxxxxxxx>
> Reported-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx>
> Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
> Signed-off-by: Chen-Yu Tsai <wens@xxxxxxxx>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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