Re: [PATCH 17/18] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916

[Lina Iyer]

On Tue, Jul 16 2019 at 08:47 -0600, Sudeep Holla wrote:
> On Mon, May 13, 2019 at 09:22:59PM +0200, Ulf Hansson wrote:
> > From: Lina Iyer <lina.iyer@xxxxxxxxxx>
> >
> > In the hierarchical layout, we are creating power domains around each CPU
> > and describes the idle states for them inside the power domain provider
> > node. Note that, the CPU's idle states still needs to be compatible with
> > "arm,idle-state".
> >
> > Furthermore, represent the CPU cluster as a separate master power domain,
> > powering the CPU's power domains. The cluster node, contains the idle
> > states for the cluster and each idle state needs to be compatible with the
> > "domain-idle-state".
> >
> > If the running platform is using a PSCI FW that supports the OS initiated
> > CPU suspend mode, which likely should be the case unless the PSCI FW is
> > very old, this change triggers the PSCI driver to enable it.
> >
> > Cc: Andy Gross <andy.gross@xxxxxxxxxx>
> > Cc: David Brown <david.brown@xxxxxxxxxx>
> > Signed-off-by: Lina Iyer <lina.iyer@xxxxxxxxxx>
> > Co-developed-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> > Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> > ---
>
> [...]
>
> > @@ -166,12 +170,57 @@
> >  				min-residency-us = <2000>;
> >  				local-timer-stop;
> >  			};
> > +
> > +			CLUSTER_RET: cluster-retention {
> > +				compatible = "domain-idle-state";
> > +				arm,psci-suspend-param = <0x1000010>;
> > +				entry-latency-us = <500>;
> > +				exit-latency-us = <500>;
> > +				min-residency-us = <2000>;
> > +			};
> > +
> > +			CLUSTER_PWRDN: cluster-gdhs {
> > +				compatible = "domain-idle-state";
> > +				arm,psci-suspend-param = <0x1000030>;
> > +				entry-latency-us = <2000>;
> > +				exit-latency-us = <2000>;
> > +				min-residency-us = <6000>;
> > +			};
> >  		};
> >  	};
>
> I was trying to understand the composition of composite state parameters
> in this series and that made me look at these DT examples.
This was meant to depict a hierarchical state format for OSI.

> What format does the above platform use ? I tried matching them to
> both original as well as extended format and I fail to understand.
> Assuming original format:
> 	State         power_state PowerLevel  StateType     StateID
> 	SPC           0x40000002   0(core)    0(Retention)  0x2 (Res0 b[29]=1?)
> 	CLUSTER_RET   0x1000010   1(clusters) 0(Retention)  0x10
> 	CLUSTER_PWRDN 0x1000030   1(clusters) 0(Retention?) 0x30
> Now extended format:
> 	State         power_state StateType     StateID
> 	SPC           0x40000002  0(Retention)  0x40000002 (Res0 b[29]=1?)
> 	CLUSTER_RET   0x1000010   0(Retention)  0x1000010
The composite state would comprise of CPU state and  Cluster state.
So for the last CPU entering idle -
(CLUSTER_RET | SPC)
0x41000012
> 	CLUSTER_PWRDN 0x1000030   0(Retention?) 0x1000030
(CLUSTER_PWRDN | SPC)
0x41000032

Hope this helps.

Lina