[PATCH v6 4/7] ARM: dts: sun8i-h3: Add thermal sensor and thermal zones

From: Vasily Khoruzhick
Date: Wed Nov 27 2019 - 00:30:12 EST


From: Ondrej Jirman <megous@xxxxxxxxxx>

There is just one sensor for the CPU.

Signed-off-by: Ondrej Jirman <megous@xxxxxxxxxx>
Signed-off-by: Vasily Khoruzhick <anarsoul@xxxxxxxxx>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index e37c30e811d3..42fd0418d678 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -177,6 +177,26 @@
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <384000000>;
};
+
+ ths: ths@1c25000 {
+ compatible = "allwinner,sun8i-h3-ths";
+ reg = <0x01c25000 0x400>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_BUS_THS>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+ clock-names = "bus", "mod";
+ nvmem-cells = <&ths_calibration>;
+ nvmem-cell-names = "calibration";
+ #thermal-sensor-cells = <0>;
+ };
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 0>;
+ };
};
};

@@ -234,4 +254,10 @@

&sid {
compatible = "allwinner,sun8i-h3-sid";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ths_calibration: thermal-sensor-calibration@34 {
+ reg = <0x34 4>;
+ };
};
--
2.24.0