Re: [RFC PATCH v5 6/9] media: tegra: Add Tegra210 Video input driver

From: Sowjanya Komatineni
Date: Tue Mar 24 2020 - 21:15:06 EST



On 3/24/20 6:08 PM, Sowjanya Komatineni wrote:

On 3/24/20 5:34 PM, Dmitry Osipenko wrote:
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23.03.2020 20:52, Sowjanya Komatineni ÐÐÑÐÑ:
+static void tegra_channel_vi_soft_reset(struct tegra_vi_channel *chan)
+{
+ÂÂÂÂ /* disable clock gating to enable continuous clock */
+ÂÂÂÂ tegra_vi_write(chan, TEGRA_VI_CFG_CG_CTRL, 0);
+ÂÂÂÂ /*
+ÂÂÂÂÂ * Soft reset memory client interface, pixel format logic, sensor
+ÂÂÂÂÂ * control logic, and a shadow copy logic to bring VI to clean state.
+ÂÂÂÂÂ */
+ÂÂÂÂ vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0xf);
+ÂÂÂÂ usleep_range(100, 200);
+ÂÂÂÂ vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0x0);
Is it safe to reset MCCIF without blocking and flushing memory requests
at first?
Yes to bring VI to clean state on errors its recommended by HW design team.
BTW, just to be clear this is Software reset.