Re: [PATCH v4 1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator

[Torsten Duwe]

On Fri, May 12, 2023 at 10:20:30AM +0800, Xingyu Wu wrote:
[...]
>  #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__
>  #define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_CRG_H__
>  
> +/* PLL clocks */
> +#define JH7110_CLK_PLL0_OUT			0
> +#define JH7110_CLK_PLL1_OUT			1
> +#define JH7110_CLK_PLL2_OUT			2

In U-Boot commit 58c9c60b Yanhong Wang added:

+
+#define JH7110_SYSCLK_PLL0_OUT                       190
+#define JH7110_SYSCLK_PLL1_OUT                       191
+#define JH7110_SYSCLK_PLL2_OUT                       192
+
+#define JH7110_SYSCLK_END                    193

in that respective file.

> +#define JH7110_PLLCLK_END			3
> +
>  /* SYSCRG clocks */
>  #define JH7110_SYSCLK_CPU_ROOT			0

If the symbolic names referred to the same items, would it be possible
to keep the two files in sync somehow?

	Torsten