Re: [PATCH net-next v4 1/2] net: dsa: microchip: ksz8: Make flow control, speed, and duplex on CPU port configurable

From: Vladimir Oltean
Date: Fri May 19 2023 - 10:30:15 EST


On Fri, May 19, 2023 at 02:46:59PM +0200, Oleksij Rempel wrote:
> +void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
> + unsigned int mode, phy_interface_t interface,
> + struct phy_device *phydev, int speed, int duplex,
> + bool tx_pause, bool rx_pause)
> +{
> + /* If the port is the CPU port, apply special handling. Only the CPU
> + * port is configured via global registers.
> + */
> + if (dev->cpu_port == port)
> + ksz8_cpu_port_link_up(dev, speed, duplex, tx_pause, rx_pause);
> +}

I'm sorry, but this is also baking in assumptions related to the
topology of the tree (that the xMII port is used as a CPU port).
The ksz8 driver may make this assumption in other places too,
but I don't want to make it even worse to fix. Is the
!dev->info->internal_phy[port] condition not enough here?