[PATCH 3/3] Documentation: kernel-parameters: Add some MIPS parameters

From: Jiaxun Yang
Date: Sun May 21 2023 - 18:33:13 EST


Those parameters lives in MIPS kernel since very start.
Document them for convenience.

Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
.../admin-guide/kernel-parameters.txt | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 9c502d3aa0cd..67a0c3f7eca3 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -713,6 +713,8 @@
Sets the size of memory pool for coherent, atomic dma
allocations, by default set to 256K.

+ coherentio [KNL,MIPS] Force enable hardware DMA cache coherency.
+
com20020= [HW,NET] ARCnet - COM20020 chipset
Format:
<io>[,<irq>[,<nodeID>[,<backplane>[,<ckp>[,<timeout>]]]]]
@@ -3626,6 +3628,8 @@

nocache [ARM]

+ nocoherentio [KNL,MIPS] Force enable software DMA cache coherency.
+
no_console_suspend
[HW] Never suspend the console
Disable suspending of consoles during suspend and
@@ -3645,6 +3649,7 @@
[KNL] Disable object debugging

nodsp [SH] Disable hardware DSP at boot time.
+ [MIPS] Disable DSP ASE at boot time.

noefi Disable EFI runtime services support.

@@ -3667,6 +3672,8 @@

nofsgsbase [X86] Disables FSGSBASE instructions.

+ noftlb [MIPS] Disable Fixed TLB at boot time.
+
nofxsr [BUGS=X86-32] Disables x86 floating point extended
register save and restore. The kernel will only save
legacy floating-point registers on task switch.
@@ -3678,6 +3685,8 @@
in certain environments such as networked servers or
real-time systems.

+ nohtw [MIPS] Disable hardware page table walker at boot time.
+
no_hash_pointers
Force pointers printed to the console or buffers to be
unhashed. By default, when a pointer is printed via %p
@@ -3758,6 +3767,8 @@

nolapic_timer [X86-32,APIC] Do not use the local APIC timer.

+ noulri [MIPS] Disable RDHWR ULR access for user space.
+
nomca [IA-64] Disable machine check abort handling

nomce [X86-32] Disable Machine Check Exception
@@ -3882,6 +3893,8 @@
[X86,PV_OPS] Disable paravirtualized VMware scheduler
clock and use the default one.

+ nowait [MIPS] Disable the wait instruction for idle.
+
nowatchdog [KNL] Disable both lockup detectors, i.e.
soft-lockup and NMI watchdog (hard-lockup).

@@ -3893,6 +3906,8 @@
LEGACY_XAPIC_DISABLED bit set in the
IA32_XAPIC_DISABLE_STATUS MSR.

+ noxpa [MIPS] Disable XPA (eXtended Physical Addressing) ASE.
+
noxsave [BUGS=X86] Disables x86 extended register state save
and restore using xsave. The kernel will fallback to
enabling legacy floating-point and sse state.
@@ -3936,6 +3951,8 @@

nr_uarts= [SERIAL] maximum number of UARTs to be registered.

+ ntlb= [MIPS] Override max number of TLB entries.
+
numa=off [KNL, ARM64, PPC, RISCV, SPARC, X86] Disable NUMA, Only
set up a single NUMA node spanning all memory.

@@ -5273,6 +5290,18 @@
rcupdate.rcu_self_test= [KNL]
Run the RCU early boot self tests

+ rd_size= [KNL,MIPS]
+ Specify size of initrd in memory.
+ Need to be used with rd_start.
+
+ rd_start= [KNL,MIPS]
+ Specify a virtual address from which to load the initrd.
+ Must in KSEG0 or XKPHYS space.
+ Need to be used with rd_size.
+
+ rdhwr_noopt [MIPS] Disable optimization of trap and emulation for
+ "RDHWR v1, $29" instruction.
+
rdinit= [KNL]
Format: <full_path>
Run specified binary instead of /init from the ramdisk,
--
2.39.2 (Apple Git-143)