[PATCH] mtd: spi-nor: gigadevice: add lock flags for GD25Q128/256 and GD25LQ128D

From: Jakub Czapiga
Date: Mon Mar 17 2025 - 14:21:03 EST


Set appropriate FLASH lock feature flags.
Set top-bottom protection configuration bit flags.

Modified chips:
- GD25Q128 (+lock, +tb)
- GD25Q256 (+lock)
- GD25Q256D, GD25Q256E (+tb)
- GD25LQ128D (+lock, +tb)

Signed-off-by: Jakub Czapiga <czapiga@xxxxxxxxxx>
---
drivers/mtd/spi-nor/gigadevice.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index ef1edd0add70..8eec6557b036 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -16,6 +16,7 @@ gd25q256_post_bfpt(struct spi_nor *nor,
/*
* GD25Q256C supports the first version of JESD216 which does not define
* the Quad Enable methods. Overwrite the default Quad Enable method.
+ * Otherwise set TB to SR(6).
*
* GD25Q256 GENERATION | SFDP MAJOR VERSION | SFDP MINOR VERSION
* GD25Q256C | SFDP_JESD216_MAJOR | SFDP_JESD216_MINOR
@@ -25,6 +26,8 @@ gd25q256_post_bfpt(struct spi_nor *nor,
if (bfpt_header->major == SFDP_JESD216_MAJOR &&
bfpt_header->minor == SFDP_JESD216_MINOR)
nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
+ else
+ nor->flags |= SNOR_F_HAS_SR_TB | SNOR_F_HAS_SR_TB_BIT6;

return 0;
}
@@ -56,12 +59,12 @@ static const struct flash_info gigadevice_nor_parts[] = {
.id = SNOR_ID(0xc8, 0x40, 0x18),
.name = "gd25q128",
.size = SZ_16M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
}, {
.id = SNOR_ID(0xc8, 0x40, 0x19),
.name = "gd25q256",
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_4BIT_BP,
.fixups = &gd25q256_fixups,
.fixup_flags = SPI_NOR_4B_OPCODES,
}, {
@@ -80,7 +83,7 @@ static const struct flash_info gigadevice_nor_parts[] = {
.id = SNOR_ID(0xc8, 0x60, 0x18),
.name = "gd25lq128d",
.size = SZ_16M,
- .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6,
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
},
};
--
2.49.0.rc1.451.g8f38331e32-goog