RE: [net-next,PATCH v2] enetc: Increase eMDIO MDC rate to 2.5 MHz

[Wei Fang]

> > No, we typically hardcode the clock frequency in the driver based on the
> NETC
> > version. Another simple method is to set the divisor to 166 instead of 66,
> which
> > will not cause any problems for using a 400MHz NETC.
> 
> There are use cases where you want the MDIO bus running at the 802.3
> speed, or higher.
> 
> Some PHYs need firmware download because the OEM saved $0.02 by not
> putting on an EEPROM. I've seen boards take 10s of seconds to download
> the firmware on boot.
> 
> The Marvell PHYs allow you access to the raw TDR cable testing values,
> which is a lot of data. Getting it faster allows nicer and more
> responsive tools.
> 
> There might be an MDIO managed switch hanging off the MDIO bus, so
> again, lots of traffic.
> 
> So please look at setting the divisor correctly to achieve 2.5Mhz, and
> maybe consider implementing the device tree property:

Yeah, you are right, using clock-frequency is more flexible. We should add 
lock-frequency support later, so that a suitable divisor can be calculated
based on the current NETC system clock rate. Thanks.

> 
>   clock-frequency:
>     description:
>       Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
>       defined 2.5MHz should only be used when all devices on the bus
> support
>       the given clock speed.
> 
> so it can be overclocked.
> 
>    Andrew