>
>
> On Mon, 13 Oct 1997, Richard B. Johnson wrote:
>
> > to turn OFF interrupts during PIO. This is dumb. The correct solution is
> > to turn OFF write-behind caching which does nothing to improve performance
> > because one seldom writes the same thing over-and-over again to the same
> > memory location in real world applications.
>
> Except on the stack, it is worth keeping the stack in the cache and using
> write back memory for stack areas. Especially on Intel with its short
> register set which makes stack memory traffic much higher than on RISC.
> Besides that, write back caches are a gain with FFT. Have a look at the
> addressing pattern of a, say, 4096 complex point (of course in-place) FFT.
>
> Greetings,
> Gabriel.
>
I'd be willing to bet a dime that the PIO problem is a write-behind cache
problem that is being masked by turning off interrupts during PIO
operation, I'll bet that changing write-back to write-through "fixes"
the problem.
Cheers,
DJ
Richard B. Johnson
Analogic Corporation
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