Re: [PATCH v7 5/7] soc: mediatek: add MT6765 scpsys and subdomain support

[Matthias Brugger]

On 13/02/2020 03:55, Macpaul Lin wrote:
> On Sun, 2020-02-09 at 22:26 +0100, Matthias Brugger wrote:
>>
>> On 07/02/2020 10:20, Macpaul Lin wrote:
>>> From: Mars Cheng <mars.cheng@xxxxxxxxxxxx>
>>>
>>> This adds scpsys support for MT6765
>>> Add subdomain support for MT6765:
>>> isp, mm, connsys, mfg, and cam.
>>>
>>> Signed-off-by: Mars Cheng <mars.cheng@xxxxxxxxxxxx>
>>> Signed-off-by: Owen Chen <owen.chen@xxxxxxxxxxxx>
>>> Signed-off-by: Macpaul Lin <macpaul.lin@xxxxxxxxxxxx>
>>> ---
>>>  drivers/soc/mediatek/mtk-scpsys.c | 130 ++++++++++++++++++++++++++++++
>>>  1 file changed, 130 insertions(+)
>>>
>>> diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
>>> index f669d3754627..9940c6d13222 100644
>>> --- a/drivers/soc/mediatek/mtk-scpsys.c
>>> +++ b/drivers/soc/mediatek/mtk-scpsys.c
>>> @@ -15,6 +15,7 @@
>>>  
>>>  #include <dt-bindings/power/mt2701-power.h>
>>>  #include <dt-bindings/power/mt2712-power.h>
>>> +#include <dt-bindings/power/mt6765-power.h>
>>>  #include <dt-bindings/power/mt6797-power.h>
>>>  #include <dt-bindings/power/mt7622-power.h>
>>>  #include <dt-bindings/power/mt7623a-power.h>
>>> @@ -749,6 +750,120 @@ static const struct scp_subdomain scp_subdomain_mt2712[] = {
>>>  	{MT2712_POWER_DOMAIN_MFG_SC2, MT2712_POWER_DOMAIN_MFG_SC3},
>>>  };
>>>  
>>> +/*
>>> + * MT6765 power domain support
>>> + */
>>> +#define SPM_PWR_STATUS_MT6765			0x0180
>>> +#define SPM_PWR_STATUS_2ND_MT6765		0x0184
>>> +
>>
>> The offsets are the same as for MT6797. Could we rename the define to something
>> generic and move it up and put it just under SPM_PWR_STATUS_2ND? Probably as a
>> separate patch.
>>
>> Regards,
>> Matthias
>>
> Loop more related owners in this mail loop.
> 
> After check it with our clock driver owners, there are different
> generations of clock IPs. Because different smart phone chips require
> different cost-function oriented design, even they use the same
> generation of clock IPs, might not have the same offsets. Take MT6765
> and MT6797 for example, the listed offsets are just coincidence.
> 
> Our clock driver owners will work on this to summarize the common offset
> parts for each generations, but at this moment, we suggest just separate
> the files for mt6797 and mt6765. Commonly used header should be come
> with the next chip which clock IP just the same generation of mt6797 or
> mt6765.
> 

Sounds good, no need to do anything here. We can do the cleanup in another patch
afterwards.

Regards,
Matthias

> Thanks
> Macpaul Lin
> 
>