Re: [RFC PATCH] iommu/dma: Allow drivers to reserve an iova range

From: isaacm
Date: Wed Feb 19 2020 - 15:06:36 EST

On 2020-02-19 03:15, Will Deacon wrote:
On Tue, Feb 18, 2020 at 05:57:18PM -0800, isaacm@xxxxxxxxxxxxxx wrote:
On 2020-02-17 07:50, Robin Murphy wrote:
> On 17/02/2020 8:01 am, Christoph Hellwig wrote:
> > On Fri, Feb 14, 2020 at 02:58:16PM -0800, Isaac J. Manjarres wrote:
> > > From: Liam Mark <lmark@xxxxxxxxxxxxxx>
> > >
> > > Some devices have a memory map which contains gaps or holes.
> > > In order for the device to have as much IOVA space as possible,
> > > allow its driver to inform the DMA-IOMMU layer that it should
> > > not allocate addresses from these holes.
> >
> > Layering violation. dma-iommu is the translation layer between the
> > DMA API and the IOMMU API. And calls into it from drivers performing
> > DMA mappings need to go through the DMA API (and be documented there).
> +1
> More than that, though, we already have "holes in the address space"
> support for the sake of PCI host bridge windows - assuming this is the
> same kind of thing (i.e. the holes are between memory regions and
> other resources in PA space, so are only relevant once address
> translation comes into the picture), then this is IOMMU API level
To make sure that we're on the same page, this support alludes to the
handling in
dma-iommu.c that reserves portions of the IOVA space for the PCI host bridge
correct? If so, then yes, this is similar.
> stuff, so even a DMA API level interface would be inappropriate.
Does this mean that the driver should be managing the IOVA space and
mappings for this device using the IOMMU API? If so, is the rationale for
this because the device driver can have the information of what IOVA ranges
can and cannot be used? Shouldn't there be a generic way of informing an
IOMMU driver about these reserved ranges? Perhaps through a device tree
property, instead of deferring this type of management to the driver?

Before we dive into designing that, can you please clarify whether the
reserved IOVA range applies to all DMA masters mastering through a
particular SMMU, or whether it's just about one specific master? I was
assuming the former, but wanted to be sure.

This situation currently applies to one master.