Re: [PATCH 0/2] KVM support for Intel PMU v5 fixed function PMC bitmap

[Like Xu]

On 27/4/2023 5:53 pm, Anselm Busse wrote:
> Starting with v5, the Intel PMU allows to indicate the available fixed
> function PMCs not only through CPUID.0AH.EDX[4:0] but also through a
> bit mask in CPUID.0AH.ECX. According to the SDM the OS can consider a
> fix function PMC i supported for:
>
> CPUID.0AH.ECX[i] || (CPUID.0AH.EDX[4:0] > i)

Yes, this feature is attractive for virtualization scenarios, and it gives 
flexibility
to control which fixed counters are available or not in the virtual machine.

However, currently KVM/x86 also supports Intel PMU V2, so I would expect
that we will review the enablement code for v3 and v4 first.

Ref: 
https://lore.kernel.org/kvm/CALMp9eQVnk8gkOpX5AHhaCr8-5Fe=qNuX8PUP1Gv2H5FSYmHSw@xxxxxxxxxxxxxx/

> This behavior is already supported by the Intel PMU driver. However, KVM
> support is missing. This patch series add the support by first
> refactoring the tracking of available fixed function PMCs in KVM from a
> number to a bitmap in the frist patch. The second patch populates the
> bitmap accoring to the rule given by the SDM mentioned above.
>
> Regards,
> Anselm
>
> Anselm Busse (2):
>    KVM: vmx/pmu: Indicate available fixed function PMCs through a bitmap
>    KVM: vmx/pmu: Add support for selected fixed vPMU enablement for PMU v5
>
>   arch/x86/include/asm/kvm_host.h |  2 +-
>   arch/x86/kvm/pmu.h              |  6 ++---
>   arch/x86/kvm/svm/pmu.c          |  2 +-
>   arch/x86/kvm/vmx/pmu_intel.c    | 40 ++++++++++++++++++++-------------
>   4 files changed, 30 insertions(+), 20 deletions(-)
>
>
> base-commit: 0cfd8703e7da687924371e9bc77a025bdeba9637