On AMD all devices in runtime suspend and SoC entering systemAFAICT the actual issue is entirely a wakeup platform firmware sequencingBut there are two ways to enter s2idle (well or the S0ix whatever is the
issue
while in a hardware sleep state and not PMEs.
It's only exposed by putting the root ports into D3 over s2idle.
AMD term for that). Either through system sleep or simply waiting that
all the needed devices runtime suspend. There should be no difference
from device perspective AFAICT.
OK that means that if we came up with a solution that utilizedAs an experiment on an unpatched kernel if I avoid letting amd-pmc bind thenAFAIK this object does not exist in ChromeOS so Linux cannot use it
the
hardware will never enter a hardware sleep state over Linux s2idle and this
issue
doesn't occur.
That shows that PMEs *do* work from D3cold.
With all of this I have to wonder if the Windows behavior of what to do with
the root
ports is tied to the uPEP requirements specified in the firmware.
Linux doesn't do any enforcement or adjustments from what uPEP indicates.
The uPEP constraints for the root port in question in an affected AMD system
has:
Package (0x04)
{
Zero,
"\\_SB.PCI0.GP19",
Zero,
Zero
},
AMD's parsing is through 'lpi_device_get_constraints_amd' so that structure
shows
as not enabled and doesn't specify any D-state requirements.
there.
What do they specify for Intel on a matching root port?I think the corresponding entry in ADL-P system for TBT PCIe root port 0
looks like this:
Package (0x03)
{
"\\_SB.PC00.TRP0",
Zero,
Package (0x02)
{
Zero,
Package (0x02)
{
0xFF,
0x03
}
}
},
I'm not entirely sure what does it tell? ;-)