Re: [patch v5 09/19] x86/cpu: Provide an AMD/HYGON specific topology parser

From: Borislav Petkov
Date: Thu Feb 01 2024 - 11:00:04 EST


On Tue, Jan 23, 2024 at 01:53:43PM +0100, Thomas Gleixner wrote:
> --- a/arch/x86/kernel/cpu/topology.h
> +++ b/arch/x86/kernel/cpu/topology.h
> @@ -9,6 +9,10 @@ struct topo_scan {
>
> // Legacy CPUID[1]:EBX[23:16] number of logical processors

/* comments pls.

> unsigned int ebx1_nproc_shift;
> +
> + // AMD specific node ID which cannot be mapped into APIC space.
> + u16 amd_nodes_per_pkg;
> + u16 amd_node_id;
> };

..

> +static bool parse_8000_001e(struct topo_scan *tscan, bool has_0xb)
> +{
> + struct {
> + // eax
> + u32 x2apic_id : 32;

The docs call this ExtendedApicId, not x2apic_id.

> + // ebx
> + u32 cuid : 8,
> + threads_per_cu : 8,
> + __rsvd0 : 16;
> + // ecx
> + u32 nodeid : 8,
> + nodes_per_pkg : 3,
> + __rsvd1 : 21;
> + // edx
> + u32 __rsvd2 : 32;
> + } leaf;
> +
> + if (!boot_cpu_has(X86_FEATURE_TOPOEXT))

s/boot_cpu_has/cpu_feature_enabled/g

> + return false;
> +
> + cpuid_leaf(0x8000001e, &leaf);

..

--
Regards/Gruss,
Boris.

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