Re: [PATCH net v3] net: stmmac: xgmac: fix handling of DPP safety error for DMA channels

From: Furong Xu
Date: Sat Feb 03 2024 - 00:12:20 EST

On Sat, 3 Feb 2024 00:58:39 +0300
Serge Semin <fancer.lancer@xxxxxxxxx> wrote:

> On Wed, Jan 31, 2024 at 10:08:28AM +0800, Furong Xu wrote:
> > Commit 56e58d6c8a56 ("net: stmmac: Implement Safety Features in
> > XGMAC core") checks and reports safety errors, but leaves the
> > Data Path Parity Errors for each channel in DMA unhandled at all, lead to
> > a storm of interrupt.
> > Fix it by checking and clearing the DMA_DPP_Interrupt_Status register.
> >
> > Fixes: 56e58d6c8a56 ("net: stmmac: Implement Safety Features in XGMAC core")
> > Signed-off-by: Furong Xu <0x1207@xxxxxxxxx>
> > ---
> > Changes in v3:
> > - code style fix, thanks Paolo Abeni
> >
> > Changes in v2:
> > - explicit enable Data Path Parity Protection
> > - add new counters to stmmac_safety_stats
> > - add detailed log
> > ---
> > drivers/net/ethernet/stmicro/stmmac/common.h | 1 +
> > .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 3 +
> > .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 57 ++++++++++++++++++-
> > 3 files changed, 60 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
> > index 721c1f8e892f..b4f60ab078d6 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/common.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
> > @@ -216,6 +216,7 @@ struct stmmac_safety_stats {
> > unsigned long mac_errors[32];
> > unsigned long mtl_errors[32];
> > unsigned long dma_errors[32];
> > + unsigned long dma_dpp_errors[32];
> > };
> >
> > /* Number of fields in Safety Stats */
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> > index 207ff1799f2c..5c67a3f89f08 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
> > @@ -303,6 +303,8 @@
> > #define XGMAC_RXCEIE BIT(4)
> > #define XGMAC_TXCEIE BIT(0)
> > #define XGMAC_MTL_ECC_INT_STATUS 0x000010cc
> > +#define XGMAC_MTL_DPP_CONTROL 0x000010e0
>
> > +#define XGMAC_DDPP_DISABLE BIT(0)
>
> Is the double "D" a typo? Shouldn't this be XGMAC_DPP_DISABLE or just
> XGMAC_DDPP (if the "DDPP" means "Disable DPP")?
>
> If so, David/Jakub, is it possible to rebase the branch with the macro
> fixed in the commit or a new cleanup patch is the only option?
>
> Other than the nit above no more notes from my side:
>
> Reviewed-by: Serge Semin <fancer.lancer@xxxxxxxxx>
>
> -Serge(y)
>

Hi Serge:

Sorry for my mistake.

DDPP is copied from Synopsys Data book: Disable Data path Parity Protection.
When it is 0x0, Data path Parity Protection is enabled.
When it is 0x1, Data path Parity Protection is disabled.

I will send a new patch.

> > #define XGMAC_MTL_TXQ_OPMODE(x) (0x00001100 + (0x80 * (x)))
> > #define XGMAC_TQS GENMASK(25, 16)
> > #define XGMAC_TQS_SHIFT 16
> > @@ -385,6 +387,7 @@
> > #define XGMAC_DCEIE BIT(1)
> > #define XGMAC_TCEIE BIT(0)
> > #define XGMAC_DMA_ECC_INT_STATUS 0x0000306c
> > +#define XGMAC_DMA_DPP_INT_STATUS 0x00003074
> > #define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x)))
> > #define XGMAC_SPH BIT(24)
> > #define XGMAC_PBLx8 BIT(16)
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> > index eb48211d9b0e..04d7c4dc2e35 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
> > @@ -830,6 +830,43 @@ static const struct dwxgmac3_error_desc dwxgmac3_dma_errors[32]= {
> > { false, "UNKNOWN", "Unknown Error" }, /* 31 */
> > };
> >
> > +static const char * const dpp_rx_err = "Read Rx Descriptor Parity checker Error";
> > +static const char * const dpp_tx_err = "Read Tx Descriptor Parity checker Error";
> > +static const struct dwxgmac3_error_desc dwxgmac3_dma_dpp_errors[32] = {
> > + { true, "TDPES0", dpp_tx_err },
> > + { true, "TDPES1", dpp_tx_err },
> > + { true, "TDPES2", dpp_tx_err },
> > + { true, "TDPES3", dpp_tx_err },
> > + { true, "TDPES4", dpp_tx_err },
> > + { true, "TDPES5", dpp_tx_err },
> > + { true, "TDPES6", dpp_tx_err },
> > + { true, "TDPES7", dpp_tx_err },
> > + { true, "TDPES8", dpp_tx_err },
> > + { true, "TDPES9", dpp_tx_err },
> > + { true, "TDPES10", dpp_tx_err },
> > + { true, "TDPES11", dpp_tx_err },
> > + { true, "TDPES12", dpp_tx_err },
> > + { true, "TDPES13", dpp_tx_err },
> > + { true, "TDPES14", dpp_tx_err },
> > + { true, "TDPES15", dpp_tx_err },
> > + { true, "RDPES0", dpp_rx_err },
> > + { true, "RDPES1", dpp_rx_err },
> > + { true, "RDPES2", dpp_rx_err },
> > + { true, "RDPES3", dpp_rx_err },
> > + { true, "RDPES4", dpp_rx_err },
> > + { true, "RDPES5", dpp_rx_err },
> > + { true, "RDPES6", dpp_rx_err },
> > + { true, "RDPES7", dpp_rx_err },
> > + { true, "RDPES8", dpp_rx_err },
> > + { true, "RDPES9", dpp_rx_err },
> > + { true, "RDPES10", dpp_rx_err },
> > + { true, "RDPES11", dpp_rx_err },
> > + { true, "RDPES12", dpp_rx_err },
> > + { true, "RDPES13", dpp_rx_err },
> > + { true, "RDPES14", dpp_rx_err },
> > + { true, "RDPES15", dpp_rx_err },
> > +};
> > +
> > static void dwxgmac3_handle_dma_err(struct net_device *ndev,
> > void __iomem *ioaddr, bool correctable,
> > struct stmmac_safety_stats *stats)
> > @@ -841,6 +878,13 @@ static void dwxgmac3_handle_dma_err(struct net_device *ndev,
> >
> > dwxgmac3_log_error(ndev, value, correctable, "DMA",
> > dwxgmac3_dma_errors, STAT_OFF(dma_errors), stats);
> > +
> > + value = readl(ioaddr + XGMAC_DMA_DPP_INT_STATUS);
> > + writel(value, ioaddr + XGMAC_DMA_DPP_INT_STATUS);
> > +
> > + dwxgmac3_log_error(ndev, value, false, "DMA_DPP",
> > + dwxgmac3_dma_dpp_errors,
> > + STAT_OFF(dma_dpp_errors), stats);
> > }
> >
> > static int
> > @@ -881,6 +925,12 @@ dwxgmac3_safety_feat_config(void __iomem *ioaddr, unsigned int asp,
> > value |= XGMAC_TMOUTEN; /* FSM Timeout Feature */
> > writel(value, ioaddr + XGMAC_MAC_FSM_CONTROL);
> >
> > + /* 5. Enable Data Path Parity Protection */
> > + value = readl(ioaddr + XGMAC_MTL_DPP_CONTROL);
> > + /* already enabled by default, explicit enable it again */
> > + value &= ~XGMAC_DDPP_DISABLE;
> > + writel(value, ioaddr + XGMAC_MTL_DPP_CONTROL);
> > +
> > return 0;
> > }
> >
> > @@ -914,7 +964,11 @@ static int dwxgmac3_safety_feat_irq_status(struct net_device *ndev,
> > ret |= !corr;
> > }
> >
> > - err = dma & (XGMAC_DEUIS | XGMAC_DECIS);
> > + /* DMA_DPP_Interrupt_Status is indicated by MCSIS bit in
> > + * DMA_Safety_Interrupt_Status, so we handle DMA Data Path
> > + * Parity Errors here
> > + */
> > + err = dma & (XGMAC_DEUIS | XGMAC_DECIS | XGMAC_MCSIS);
> > corr = dma & XGMAC_DECIS;
> > if (err) {
> > dwxgmac3_handle_dma_err(ndev, ioaddr, corr, stats);
> > @@ -930,6 +984,7 @@ static const struct dwxgmac3_error {
> > { dwxgmac3_mac_errors },
> > { dwxgmac3_mtl_errors },
> > { dwxgmac3_dma_errors },
> > + { dwxgmac3_dma_dpp_errors },
> > };
> >
> > static int dwxgmac3_safety_feat_dump(struct stmmac_safety_stats *stats,
> > --
> > 2.34.1
> >