[PATCH v1] clk: keystone: sci-clk: Adding support for non contiguous clocks

[Udit Kumar]

Most of clocks and their parents are defined in contiguous range,
But in few cases, there is gap in clock numbers[0].

Driver assumes clocks to be in contiguous range, and assigns
accordingly.

New firmware started returning error in case of
non-available clock id.  Therefore drivers throws error while
re-calculate and other functions.

In this fix, before assigning and adding clock in list,
driver checks if given clock is valid or not.

Fixes: 3c13933c6033 ("clk: keystone: sci-clk: add support for dynamically probing clocks")

[0] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
Section Clocks for NAVSS0_CPTS_0 Device,
clock id 12-15 and 18-19 not present

Signed-off-by: Udit Kumar <u-kumar1@xxxxxx>
---
Original logs
https://gist.github.com/uditkumarti/de4b36b21247fb36725ad909ce4812f6#file-original-logs
Line 2630 for error

Logs with fix
https://gist.github.com/uditkumarti/de4b36b21247fb36725ad909ce4812f6#file-with-fix
Line 2594 

 drivers/clk/keystone/sci-clk.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c
index 35fe197dd303..d417ec018d82 100644
--- a/drivers/clk/keystone/sci-clk.c
+++ b/drivers/clk/keystone/sci-clk.c
@@ -517,6 +517,8 @@ static int ti_sci_scan_clocks_from_dt(struct sci_clk_provider *provider)
 	int num_clks = 0;
 	int num_parents;
 	int clk_id;
+	int max_clk_id;
+	u64 freq;
 	const char * const clk_names[] = {
 		"clocks", "assigned-clocks", "assigned-clock-parents", NULL
 	};
@@ -584,6 +586,7 @@ static int ti_sci_scan_clocks_from_dt(struct sci_clk_provider *provider)
 				}
 
 				clk_id = args.args[1] + 1;
+				max_clk_id = clk_id + num_parents;
 
 				while (num_parents--) {
 					sci_clk = devm_kzalloc(dev,
@@ -592,11 +595,20 @@ static int ti_sci_scan_clocks_from_dt(struct sci_clk_provider *provider)
 					if (!sci_clk)
 						return -ENOMEM;
 					sci_clk->dev_id = args.args[0];
-					sci_clk->clk_id = clk_id++;
-					sci_clk->provider = provider;
-					list_add_tail(&sci_clk->node, &clks);
+					/* check if given clock id is valid by calling get_freq */
+					/* loop over max possible ids */
+					do {
+						sci_clk->clk_id = clk_id++;
 
-					num_clks++;
+						ret = provider->ops->get_freq(provider->sci,
+							   sci_clk->dev_id, sci_clk->clk_id, &freq);
+					} while (ret != 0 && clk_id < max_clk_id);
+
+					sci_clk->provider = provider;
+					if (ret == 0) {
+						list_add_tail(&sci_clk->node, &clks);
+						num_clks++;
+					}
 				}
 			}
 
-- 
2.34.1