Re: [PATCH] arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts

From: Konrad Dybcio
Date: Tue Feb 06 2024 - 11:51:59 EST

Next message: Tejun Heo: "Re: [PATCH] workqueue: Fix pool->nr_running type back to atomic"
Previous message: Nikita Zhandarovich: "[PATCH] drm/amd/display: fix NULL checks for adev->dm.dc in amdgpu_dm_fini()"
In reply to: Krzysztof Kozlowski: "[PATCH] arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

On 5.02.2024 17:31, Krzysztof Kozlowski wrote:
> Each group of MSI interrupts is mapped to the separate host interrupt.
> Describe each of interrupts in the device tree for PCIe hosts. This
> also corrects PCIe1 and PCIe2 first MSI interrupt.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>
> ---
>
> Not tested on HW.

Booted sc8180x-primus, NVMe is still accessible

Tested-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Konrad

Next message: Tejun Heo: "Re: [PATCH] workqueue: Fix pool->nr_running type back to atomic"
Previous message: Nikita Zhandarovich: "[PATCH] drm/amd/display: fix NULL checks for adev->dm.dc in amdgpu_dm_fini()"
In reply to: Krzysztof Kozlowski: "[PATCH] arm64: dts: qcom: sc8180x: describe all PCI MSI interrupts"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]